Information about Logic---Parity Generators and Checkers
Devices in the parity generator and checker logic family are component-level devices used to evaluate the number of bits in a digital word that are set to 1, and generate (or evaluate) an additional parity bit which indicates whether the number of bits in the word set to 1 is even or odd. This function is commonly used as a simple means of detecting data errors that may have been introduced during transmission.
All Products (1-50) of Logic---Parity Generators and Checkers
Our website uses cookies to improve your user experience. If you continue browsing, we assume that you consent to our use of cookies. More information can be found in our privacy policy.
